The HiFiBerry Digi user “Pretender” has written a very good guide how to use the board to output Dolby Digital and DTS to an external home theater system. This will output the plain AC3/DTS data stream without decoding it on the Raspberry Pi. Check out his guide.
P.S. We expect that this should work out-of-the-box in Raspbmc soon.
One argument against optical SPDIF transmission is jitter. I want to show the impact of a TOSLINK transmission line on jitter. This is a purely visual approach showing the jitter. I do not do exact jitter measurements!
The setup is as follows: A WM8804 drives an Everlight PLT/133 optical transmitter. This is connected via a 2m optical cable to a Everlight PLR/135 receiver. The SPDIF interface chip used an external 27MHz crystal as clock source.
Have a look at these two oscilloscope pictures. The first shows an audio transmission at 48kHz sample rate, the second at 192kHz sample rate .
Interesting difference – isn’t it? At 48kHz sample rate, there is almost no jitter visible, but at 192kHz, there is a lot of jitter.
This shows only, that jitter is measurable. Is it audible? Many modern DAC chips should have no problems with this kind of jitter. But it cannot be excluded, that there might be audible differences, especially on high sample rates.
Apart from the jitter there is one major advantage of an optical digital connection: there is no electrical connection between transmitter and receiver. This means, there is no risk for ground loops, which are usually a bigger problem, than jitter.
What happens, if we use a high-quality sine wave from a function generator as the input? Look at this:
No visible jitter! Why does the signal look so much better? Is it only a better signal quality created on the input? I don’t know it yet. But I suppose, that the SPDIF interface chip also has an impact on the jitter. In our tests, the 48kHz sample used an internal master clock of 256xfs, while the 192kHz test used only 128xfs for the internal master clock. Therefore it is possible, that the internal clock configuration of the chip has a major impact on jitter, even with the same external clock source (a crystal oscillator in our case).
There are a lot more questions than answers, e.g.:
- What is the impact of jitter from the external clock source?
- Does the internal master clock configuration have an impact on jitter?
- How do other SPDIF sender/receiver perform?
We will look into some of these aspects in the future.